ADC-Assisted Random Sampler Architecture for Efficient Sparse Signal Acquisition

A method for sampling Fourier sparse signals for efficient implementation of analog-to-information converters is proposed. The solution reconstructs Nyquist rate high-resolution signal from Nyquist rate low-resolution and sub-Nyquist rate high-resolution samples. For implementation, an architecture based on customized reconfigurable successive approximation register analog-to-digital converter is proposed, simulated, and demonstrated. The power consumption with a 90-nm CMOS process is less than 26 μW with 1-Msample/s rate in reconfigurable 3/10-bit mode. The number of floating point operations per second needed for signal recovery is less than 2% required by the orthogonal matching pursuit algorithm. The functionality of the solution has been verified with an experimental system.n

Authors:
Safarpour Mehdi, Inanlou Reza, Charmi Mostafa, Shoaei Omid, Silvén Olli

Publication type:
A1 Journal article – refereed

Place of publication:

Keywords:
Analog-digital conversion, analog-digital integrated circuits

Published:

Full citation:
M. Safarpour, R. Inanlou, M. Charmi, O. Shoaei and O. Silvén, “ADC-Assisted Random Sampler Architecture for Efficient Sparse Signal Acquisition,” in IEEE Transactions on Very Large Scale Integration (VLSI) Systems. doi: 10.1109/TVLSI.2018.2821696

DOI:
https://doi.org/10.1109/TVLSI.2018.2821696

Read the publication here:
http://urn.fi/urn:nbn:fi-fe201804186594