MIMO Detector for LTE/LTE-A Uplink Receiver

We propose a carefully selected receiver structure, detector and detector implementation architecture for multiple-input multiple-output (MIMO) uplink base station receiver for fourth generation (4G) wireless cellular systems. First, we compare different receiver algorithms and structures for single-carrier frequency-division multiple access (SC-FDMA) uplink transmission to get a good understanding of the performance and complexity of these algorithms and their suitability for practical realization. One of those structures, namely the frequency domain MMSE equalization with sphere detection (SD), is proposed for implementation. The receiver consists of separate stages for inter-symbol interference (ISI) and inter-antenna interference (IAI) mitigation in frequency selective MIMO channels. Frame error rate (FER) performance is studied via simulations in realistic wireless channels and practical system parameters. K-best SD is selected as a detector algorithm for this receiver. There are several publications proposing a sort-free architecture for tree search type of detectors. Both a conventional K-best architecture and a sort-free architecture are implemented on a Xilinx Virtex-6 field-programmable gate array (FPGA) using High Level Synthesis (HLS) tool. Both architectures support 4 × 4 MIMO with 64-level modulation (64-QAM). Complexity results confirm that avoiding the sorter is not always recommended. The benefit of sort-free architecture depends on the system parameters.

Authors:
Hänninen Tuomo, Ketonen Johanna, Juntti Markku

Publication type:
A1 Journal article – refereed

Place of publication:

Keywords:
FPGA, High level synthesis (HLS), K-best, LTE, MIMO detector

Published:

Full citation:
Hänninen, T., Ketonen, J. & Juntti, M. J Sign Process Syst (2019) 91: 423. https://doi.org/10.1007/s11265-018-1329-z

DOI:
https://doi.org/10.1007/s11265-018-1329-z

Read the publication here:
http://urn.fi/urn:nbn:fi-fe2019101633280