This paper proposes how to define the optimum number of stacked transistors in a multi-stacked CMOS power amplifier (PA) topology, based on several physical as well as circuit design aspects. [...]
This paper discusses the design requirements of class C auxiliary (aux) amplifiers deployed in Doherty power amplifiers (DPA). Taking conduction angle and back-off (BO) level into account a [...]
Design of Multi-Stacked CMOS mm-Wave Power Amplifiers for Phased Array Applications Using Triple-Well Process
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This paper concerns with the design of multi-stacked CMOS millimeter-wave power amplifiers suitable for phased array front-end applications using triple-well process. The parasitics posed by [...]
Performance Improvement of Multi-Stacked CMOS mm-Wave Power Amplifiers Based on Negative Capacitance Phase Compensation
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This paper proposes a method for performance improvement of multi-stacked CMOS millimeter-wave power amplifiers based on negative capacitance phase detuning, which can be generalized to other [...]
